The 9th International Workshop on Dependable Many-Core Computing
CALL FOR PAPERS
As part of The International Conference on High Performance Computing & Simulation (HPCS 2017)
Submission Deadline: April 15, 2017
Submissions could be for full papers, short papers, poster papers, or posters
July 17 – July 21, 2017
SCOPE AND OBJECTIVES
Computing systems with a large number of processing units are increasingly common, both in the form of processors employing multiple execution cores (e.g., multi-core CPUs, GPUs), or computing clusters with a large number of nodes. These many-core architectures bring up new capabilities, opportunities, as well as challenges. As the number of cores increases, so does the probability to have faults, both due to hardware issues (e.g., physical defects introduced during fabrication), software problems (e.g., a single crashed process bringing down the whole computation) or communication issues in the network infrastructure.
This workshop focuses on software and/or hardware solutions to dependability and fault-tolerance in multi- and many-core systems.
The DMCC Workshop topics of interest include (but are not limited to) the following:
Dependable/Fault-Tolerant Many-Core Architectures
Power-Aware Many-Core Design
Dependable & Secure Many-Core Designs
Many-Core Development and Design Tools
Dependability and Fault Tolerance in Simulation
System-Level Many-Core Implementation
Many-Core Interconnect Technology
Many-Core System-On-Chip Development
Reconfigurable Computing and FPGAs
Design for Testing
Hardware and Software Debug Facilities
Many-Core Programming and Optimization for Dependability
Resilience of HPC and Many-Core Systems
Application Partitioning and Load Balancing
Hypervisors and Virtual Machine Technology
Trusted and Untrusted Environments
Virtualization for Dependability
Dependability through Multi-Threading / Multi-Processing
Fault Detection Techniques
Fault-Tolerant Software Design
Fault-Tolerant Hardware Design
Fault-Tolerant HW/SW Co-Design
Modeling and Simulation of Dependable and Fault Tolerant Systems
Formal Techniques for Dependable Hardware/Software Design
INSTRUCTIONS FOR PAPER SUBMISSIONS
You are invited to submit original and unpublished research works on above and other topics related to dependable and resilient many-core computing systems. Submitted papers must not have been published or simultaneously submitted elsewhere. For Regular papers, please submit a PDF copy of your full manuscript, not to exceed 8 double-column formatted pages per template, and include up to 6 keywords and an abstract of no more than 400 words. Additional pages will be charged additional fee. Submission should include a cover page with authors' names, affiliation addresses, fax numbers, phone numbers, and all authors email addresses. Please, indicate clearly the corresponding author(s) although all authors are equally responsible for the manuscript. Short papers (up to 4 pages), poster papers and posters (please refer to http://hpcs2017.cisedu.info/1-call-for-papers-and-participation/call-for-posters for posters submission details) will also be considered. Please specify the type of submission you have. Please include page numbers on all preliminary submissions to make it easier for reviewers to provide helpful comments.
Submit a PDF copy of your full manuscript to the workshop paper submission site at http://cisedu.us/cis/hpcs/17/users/upload.jsp. In the form you fill out, please indicate that the submission is for DMCC 2017 in the Notes/Comments field of the uploading form. If the submission is for a poster paper or short paper, indicate that as well on the manuscript and in the form's Comments field. Acknowledgement will be sent within 48 hours of submission.
Only PDF files will be accepted, uploaded to the submission link above. Each paper will receive a minimum of three reviews. Papers will be selected based on their originality, relevance, significance, technical clarity and presentation, language, and references. Submission implies the willingness of at least one of the authors to register and present the paper, if accepted. At least one of the authors of each accepted paper will have to register and attend the HPCS 2017 conference to present the paper at the workshop.
Accepted papers will be published in the Conference proceedings. Instructions for final manuscript format and requirements will be posted on the HPCS 2017 Conference web site. It is our intent to have the proceedings formally published in hard and soft copies and be available at the time of the conference. The proceedings is projected to be included in the IEEE or ACM Digital Library and indexed in all major indexing services accordingly.
Plans are underway to have the best papers, in extended version, selected for possible publication in a journal as special issue. Detailed information will soon be announced and will be made available on the conference website.
If you have any questions about paper submission or the workshop, please contact the workshop organizers.
Paper Submissions: ------------------------------------------- April 15, 2017
Acceptance Notification: -------------------------------------- April 28, 2017
Camera Ready Papers and Registration Due by: ----------- May 11, 2017
Conference Dates: -------------------------------------------- July 17 – 21, 2017
For information or questions about Conference's paper submission, tutorials, posters, workshops, special sessions, exhibits, demos, panels and forums organization, doctoral colloquium, and any other information about the conference location, registration, paper formatting, etc., please consult the Conference’s web site at URL: http://hpcs2017.cisedu.info or http://cisedu.us/rp/hpcs17 or contact one of the Conference's organizers.