Workshop03-WEHA
International Workshop on Exploitation of high performance Heterogeneous Architectures and Accelerators
(WEHA 2017)
CALL FOR PAPERS
As part of The International Conference on High Performance Computing & Simulation (HPCS 2017)
Genoa, Italy
Submission Deadline: April 20, 2017
Submissions could be for full papers, short papers, poster papers, or posters
July 17 – July 21, 2017
SCOPE AND OBJECTIVES
For the last years, we have seen significant changes in processor architectures to improve computing performance and to overcome the physical limitations of increasing the clock frequency. The importance of hardware accelerators (GPUs, co-processors, FPGAs, etc.) has rapidly increased, especially in the computationally demanding disciplines such as realistic 3D computer graphics and high-performance scientific computing. The use of these accelerators for General-Purpose computation achieves speedups of orders of magnitude versus optimized CPU implementations, as well as reduces energy requirements. They have become powerful, capable, and inexpensive co-processors useful for a wide variety of computation.
Moreover, it has become a common trend to see the development of clusters and supercomputers, where nodes include not only CPU cores but also accelerators. An efficient exploitation of these heterogeneous systems requires sharing the work among all available resources.
The aim of this workshop is to strongly encourage the exchange of experiences and knowledge in novel solutions exploiting and defining new trends in hardware accelerators and/or heterogeneous systems, including hardware architecture, resource management, software tools, and applications.
The authors of the papers selected for the workshop may be invited to submit extended versions of their manuscripts to be considered for publication in a journal special issue.
The WEHA Workshop topics include (but are not limited to) the following:
Languages and Compilers for Hardware Accelerators
Programming Models for Heterogeneous Architectures
Resource Management of Heterogeneous Architectures
Libraries and Tools to Simplify the Programming of Hardware Accelerators and/or Heterogeneous Architectures
Manual and Automatic Performance Optimization Techniques for Hardware Accelerators and/or Heterogeneous Architectures
Application Development Experience on Hardware Accelerators and/or Heterogeneous Architectures
Benchmarking of Hardware Accelerators
Modeling and Performance Prediction for Hardware Accelerators and/or Heterogeneous Architectures
Application-specific Acceleration Hardware/Software
Algorithms and hardware architectures for reduced power, energy and heat
Accelerated Computing and Energy
Energy-Efficient Programming models for computing paradigms
Novel Accelerator and Heterogeneous Architectures
Case Studies related to Hardware Accelerators and/or Heterogeneous Architectures
INSTRUCTIONS FOR PAPER SUBMISSIONS
You are invited to submit original and unpublished research works on above and other topics related to exploitation of hardware accelerators and Energy-aware and design of high performance heterogeneous architectures. Submitted papers must not have been published or simultaneously submitted elsewhere. For Regular papers, please submit a PDF copy of your full manuscript, not to exceed 8 double-column formatted pages per template, and include up to 6 keywords and an abstract of no more than 400 words. Additional pages will be charged additional fee. Submission should include a cover page with authors' names, affiliation addresses, fax numbers, phone numbers, and all authors email addresses. Please, indicate clearly the corresponding author(s) although all authors are equally responsible for the manuscript. Short papers (up to 4 pages), poster papers and posters (please refer to http://hpcs2017.cisedu.info/1-call-for-papers-and-participation/call-for-posters for posters submission details) will also be considered. Please specify the type of submission you have. Please include page numbers on all preliminary submissions to make it easier for reviewers to provide helpful comments.
Submit a PDF copy of your full manuscript via email to the workshop organizers at ramon.doallo@udc.es and jgonzalezd@udc.es. Acknowledgement will be sent within 48 hours of submission.
Only PDF files will be accepted, uploaded to the submission link above. Each paper will receive a minimum of three reviews. Papers will be selected based on their originality, relevance, significance, technical clarity and presentation, language, and references. Submission implies the willingness of at least one of the authors to register and present the paper, if accepted. At least one of the authors of each accepted paper will have to register and attend the HPCS 2017 conference to present the paper at the workshop.
PROCEEDINGS
Accepted papers will be published in the Conference proceedings. Instructions for final manuscript format and requirements will be posted on the HPCS 2017 Conference web site. It is our intent to have the proceedings formally published in hard and soft copies and be available at the time of the conference. The proceedings is projected to be included in the IEEE or ACM Digital Library and indexed in all major indexing services accordingly.
SPECIAL ISSUE
Plans are underway to have the best papers, in extended version, selected for possible publication in a journal as special issue. Detailed information will soon be announced and will be made available on the conference website.
If you have any questions about paper submission or the workshop, please contact the workshop organizers.
IMPORTANT DATES
Paper Submissions: ------------------------------------------- April 20, 2017
Acceptance Notification: -------------------------------------- April 30, 2017
Camera Ready Papers and Registration Due by: ----------- May 11, 2017
Conference Dates: -------------------------------------------- July 17 – 21, 2017
WORKSHOP ORGANIZERS
Ramón Doallo Biempica
Facultade de Informática, Universidade da Coruña (UDC)
Campus de Elviña, s/n, A Coruña, Spain
Phone: +34 881 011 220, ext. 1220
Fax: +34-981-167160
Email: ramon.doallo@udc.es
Jorge González-Domínguez
Facultade de Informática, Universidade da Coruña (UDC)
Campus de Elviña, s/n, A Coruña, Spain
Phone: +34-981-167000, ext. 6076
Fax: +34-981-167160
Email: jgonzalezd@udc.es
International Program Committee*:
All submitted papers will be rigorously reviewed by the workshop technical program committee members following similar criteria used in HPCS 2017 and will be published as part of the HPCS 2017 Proceedings.
Basilio B. Fraguela, Universidade da Coruña, Spain
Nicolás Guil, Universidad de Málaga, Spain
Jan C. Kässens, Christian Albrechts Universität-Kiel, Germany
Yongchao Liu, Georgia Institute of Technology, Georgia, USA
Enrique S. Quintana Ortí, Universidad Jaime I, Spain
Bertil Schmidt, Johannes Gutenberg Universität-Mainz, Germany
Federico Silla, Universidad Politécnica de Valencia, Spain
Lars Wienbrandt, Christian Albrechts Universität-Kiel, Germany
TBA, TBA
(* Committee formation is pending and will be finalized shortly.)
For information or questions about Conference's paper submission, tutorials, posters, workshops, special sessions, exhibits, demos, panels and forums organization, doctoral colloquium, and any other information about the conference location, registration, paper formatting, etc., please consult the Conference’s web site at URL: http://hpcs2017.cisedu.info or http://cisedu.us/rp/hpcs17 or contact one of the Conference's organizers.